docs(profile): update academic profile and fix Scholar badge
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### Hi there 👋
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I am currently a doctoral student in the [School of Integrated Circuits](https://www.ime.tsinghua.edu.cn/index.htm), Tsinghua University (SIC THU, 清华大学集成电路学院).
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I am Wenbo Guo (郭文博). I received my Ph.D. from the [School of Integrated Circuits](https://www.ime.tsinghua.edu.cn/index.htm), Tsinghua University (SIC THU, 清华大学集成电路学院), in 2025. I am currently a postdoctoral researcher at the [College of Computer Science and Artificial Intelligence](https://ai.fudan.edu.cn/), Fudan University (复旦大学计算与智能创新学院), under the supervision of [Yunlei Zhao](https://dblp.org/pid/51/2976.html) (赵运磊).
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My research interests include computer architecture, cryptographic hardware, post-quantum cryptography (PQC), digital integrated circuit (IC) design, side-channel security, and fully homomorphic encryption (FHE). My work has appeared in IEEE and ACM journals and at international conferences.
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My research interest includes computer architecture, and hardware accelerator of post-quantum cryptography (PQC) and fully homomorphic encryption (FHE). I have published some papers at IEEE conferences and journals <a href="https://scholar.google.com/citations?user=CryOyUsAAAAJ"><img src="https://img.shields.io/endpoint?url=https%3A%2F%2Fcdn.jsdelivr.net%2Fgh%2Fgwbeip%2Fgwbeip.github.io%40google-scholar-stats%2Fgs_data_shieldsio.json&logo=Google%20Scholar&labelColor=f6f6f6&color=9cf&style=flat&label=citations"></a>.
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[](https://scholar.google.com/citations?user=CryOyUsAAAAJ)
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### 🔥 News
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<!-- - *2023.02.10*: 🎉🎉 Start school. -->
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- *2023.09.25*: 🎉 One paper accepted by IEEE TC, about modifying the split-radix NTT for CRYSTALS-Kyber.
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- *2023.08.15*: 🎉 One paper accepted by IEEE TCAS-I, about enabling mixed radix-2/4 NTT in the hardware implementation of CRYSTALS-Kyber PQC by a novel memory access pattern.
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- *2023.08.07*: 🛠️ Start school.
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- *2023.06.26*: Doctoral Practice at IIISCT, Xi'an, China.
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- *2023.02.15*: Teaching assistant of microprocessor principle and design.
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- *2023.02.10*: 🛠️ Start school.
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- *2026.09*: 🎉 Four post-quantum cryptographic algorithms (OPS-DSA, BW-KEM, DTRU-KEM, and AFS-KEX) were selected for the first round of [NGCC](https://www.niccs.org.cn/symmbzyjy/tzgg/pc/content/2100859557292625920/content_2100859557292625920.html). See [security analyses and updates](https://ngcc.dev/reports/index.html).
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### 📝 Publications
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- `Preprint arXiv` **W. Guo**, ["High-Speed (7, 2) Compressor Using A Fast Carry-Generation Logic based on Sorting Network,"](https://arxiv.org/abs/2309.03643) arXiv preprint arXiv:2309.03643, 2023
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- `[C] ESORICS 2026` Hengchuan Zou, Songlin Li, Jieyu Zheng, Xiaowen Hu, Hanyu Wei, Weizhi Ao, Yifan Dong, **Wenbo Guo**, and Yunlei Zhao, ["DTRU: A Versatile, Compact, Simple, and Robust NTRU KEM with Double E_8 Encoding,"](https://eprint.iacr.asia/2026/1701.pdf) in ESORICS 2026.
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- `[J] ACM TACO` Hanyu Wei, Wenqian Li, Shiyu Shen, Hao Yang, **Wenbo Guo**, and Yunlei Zhao, ["Vectorized SVE2 Optimization of the Post-Quantum Signature ML-DSA on ARMv9-A Architecture,"](https://dl.acm.org/doi/abs/10.1145/3839362) in ACM Transactions on Architecture and Code Optimization.
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- `[Preprint] arXiv` **W. Guo**, ["High-Speed (7, 2) Compressor Using A Fast Carry-Generation Logic based on Sorting Network,"](https://arxiv.org/abs/2309.03643) arXiv:2309.03643, 2023.
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- `[J] IEEE TC` **W. Guo** and S. Li, ["Split-Radix based Compact Hardware Architecture for CRYSTALS-Kyber,"](https://ieeexplore.ieee.org/document/10264919) in IEEE Transactions on Computers, doi: 10.1109/TC.2023.3320040.
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- `[J] IEEE TCAS-I` **W. Guo** and S. Li, ["Highly-Efficient Hardware Architecture for CRYSTALS-Kyber With a Novel Conflict-Free Memory Access Pattern,"](https://ieeexplore.ieee.org/document/10231113) in IEEE Transactions on Circuits and Systems I: Regular Papers, doi: 10.1109/TCSI.2023.3306347.
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- `[J] IEEE TCAS-II` **W. Guo**, S. Li and L. Kong, ["An Efficient Implementation of KYBER,"](https://ieeexplore.ieee.org/document/9509281) in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 1562-1566, March 2022, doi: 10.1109/TCSII.2021.3103184.
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- `[C] IEEE ISCAS` **W. Guo** and S. Li, ["Area-Efficient Modular Reduction Structure and Memory Access Scheme for NTT,"](https://ieeexplore.ieee.org/document/9401571) 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, 2021, pp. 1-5, doi: 10.1109/ISCAS51556.2021.9401571.
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- `[J] IEEE TVLSI` **W. Guo** and S. Li, ["Fast Binary Counters and Compressors Generated by Sorting Network,"](https://ieeexplore.ieee.org/document/9388166) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 6, pp. 1220-1230, June 2021, doi: 10.1109/TVLSI.2021.3067010.
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- `[J] IEEE TCAS-II` **W. Guo**, S. Li, and L. Kong, ["An Efficient Implementation of KYBER,"](https://ieeexplore.ieee.org/document/9509281) in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 1562–1566, March 2022, doi: 10.1109/TCSII.2021.3103184.
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- `[C] IEEE ISCAS 2021` **W. Guo** and S. Li, ["Area-Efficient Modular Reduction Structure and Memory Access Scheme for NTT,"](https://ieeexplore.ieee.org/document/9401571) in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, 2021, pp. 1–5, doi: 10.1109/ISCAS51556.2021.9401571.
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- `[J] IEEE TVLSI` **W. Guo** and S. Li, ["Fast Binary Counters and Compressors Generated by Sorting Network,"](https://ieeexplore.ieee.org/document/9388166) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 6, pp. 1220–1230, June 2021, doi: 10.1109/TVLSI.2021.3067010.
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### 🛠️ Projects
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- RISC-V processor with RV64I instruction set, tape-out with TSMC 110nm process, support [RT-Thread](https://github.com/RT-Thread/rt-thread) operating system.
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- Hardware accelerator of CRYSTALS-Kyber.
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- Hardware accelerator of B/FV FHE.
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- Contributed to the NGCC project.
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### 🤝 Professional Service
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**Journal Reviewer**
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- IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)
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- IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II)
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### 📫 Contact Information
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- **Email:** [guowenbo@fudan.edu.cn](mailto:guowenbo@fudan.edu.cn)
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- **Address:** Room A7019, No. 2 Interdisciplinary Research Building, Jiangwan Campus, Fudan University, Shanghai, China.
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- **ORCID:** [0000-0003-3204-7236](https://orcid.org/0000-0003-3204-7236)
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<!--
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- RISC-V processor implementing the RV64I instruction set, taped out using TSMC's 110 nm process, with support for the [RT-Thread](https://github.com/RT-Thread/rt-thread) operating system.
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- Hardware accelerator for CRYSTALS-Kyber.
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- Hardware accelerator for B/FV fully homomorphic encryption.
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-->
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<!--
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### 🎖 Honors and Awards
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- `2021` Comprehensive excellent scholarship.
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- `2021` Scholarship for comprehensive excellence.
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- `2018` National Scholarship.
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- `2018` The Second National Undergraduate IC Innovation and Entrepreneurship Competition (第二届全国大学生集成电路创新创业大赛), First prize of Northwest Division, National Finals Excellence Award.
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- `2017` Some first and special prizes in some mathematical competitions (Non Mathematics Majors).
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- `2018` The Second National Undergraduate IC Innovation and Entrepreneurship Competition (第二届全国大学生集成电路创新创业大赛): First Prize, Northwest Division; Excellence Award, National Finals.
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- `2017` First and special prizes in mathematics competitions for non-mathematics majors.
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- `2017` National Scholarship.
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- `2016` National Scholarship.
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-->
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### 📖 Educations
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- *2019.09 - now*, Doctoral student in the School of Integrated Circuits, Tsinghua University (SIC THU), Beijing, China.
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- *2015.09 - 2019.06*, Undergraduate, School of Software and Microelectronics, Northwestern Polytechnical University (NPU), Xi'an, China.
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<!--
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### 📖 Education
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- *2019.09 – 2025*: Ph.D., School of Integrated Circuits, Tsinghua University (SIC THU), Beijing, China.
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- *2015.09 – 2019.06*: Undergraduate student, School of Software and Microelectronics, Northwestern Polytechnical University (NPU), Xi'an, China.
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-->
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