From 8bb0d189a970f0bf7d96af06238e52f8c12c2477 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Wenbo=20Guo=20=28=E9=83=AD=E6=96=87=E5=8D=9A=29?= Date: Mon, 25 Sep 2023 09:27:45 +0800 Subject: [PATCH] update README --- README.md | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index f653b1a..f6fde33 100644 --- a/README.md +++ b/README.md @@ -7,6 +7,7 @@ My research interest includes computer architecture, and hardware accelerator of ### 🔥 News +- *2023.09.25*:  🎉 One paper accepted by IEEE TC, about modifying the split-radix NTT for CRYSTALS-Kyber. - *2023.08.15*:  🎉 One paper accepted by IEEE TCAS-I, about enabling mixed radix-2/4 NTT in the hardware implementation of CRYSTALS-Kyber PQC by a novel memory access pattern. - *2023.08.07*:  🛠️ Start school. - *2023.06.26*:   Doctoral Practice at IIISCT, Xi'an, China. @@ -15,6 +16,8 @@ My research interest includes computer architecture, and hardware accelerator of ### 📝 Publications +- `Preprint arXiv` **W. Guo**, ["High-Speed (7, 2) Compressor Using A Fast Carry-Generation Logic based on Sorting Network,"](https://arxiv.org/abs/2309.03643) arXiv preprint arXiv:2309.03643, 2023 + - `[J] IEEE TCAS-I` **W. Guo** and S. Li, ["Highly-Efficient Hardware Architecture for CRYSTALS-Kyber With a Novel Conflict-Free Memory Access Pattern,"](https://ieeexplore.ieee.org/document/10231113) in IEEE Transactions on Circuits and Systems I: Regular Papers, doi: 10.1109/TCSI.2023.3306347. - `[J] IEEE TCAS-II` **W. Guo**, S. Li and L. Kong, ["An Efficient Implementation of KYBER,"](https://ieeexplore.ieee.org/document/9509281) in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 1562-1566, March 2022, doi: 10.1109/TCSII.2021.3103184. @@ -23,9 +26,7 @@ My research interest includes computer architecture, and hardware accelerator of - `[J] IEEE TVLSI` **W. Guo** and S. Li, ["Fast Binary Counters and Compressors Generated by Sorting Network,"](https://ieeexplore.ieee.org/document/9388166) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 6, pp. 1220-1230, June 2021, doi: 10.1109/TVLSI.2021.3067010. -#### Preprint -- `arXiv` **W. Guo**, ["High-Speed (7, 2) Compressor Using A Fast Carry-Generation Logic based on Sorting Network,"](https://arxiv.org/abs/2309.03643) arXiv preprint arXiv:2309.03643, 2023 ### 🛠️ Projects - RISC-V processor with RV64I instruction set, tape-out with TSMC 110nm process, support [RT-Thread](https://github.com/RT-Thread/rt-thread) operating system.