From 7dd6ea9a2871bcfbc68f63e9f65bb6da79e359b8 Mon Sep 17 00:00:00 2001
From: gwbeip <doregist@yeah.net>
Date: Tue, 15 Aug 2023 21:49:17 +0800
Subject: [PATCH] update README

---
 README.md | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/README.md b/README.md
index 2f1a0a4..f6eadee 100644
--- a/README.md
+++ b/README.md
@@ -5,7 +5,7 @@ I am currently a doctoral student in the [School of Integrated Circuits](https:/
 
 My research interest includes computer architecture, and hardware accelerator of post-quantum cryptography (PQC) and fully homomorphic encryption (FHE). I have published some papers at IEEE conferences and journals <a href="https://scholar.google.com/citations?user=CryOyUsAAAAJ"><img src="https://img.shields.io/endpoint?url=https%3A%2F%2Fcdn.jsdelivr.net%2Fgh%2Fgwbeip%2Fgwbeip.github.io%40google-scholar-stats%2Fgs_data_shieldsio.json&amp;logo=Google%20Scholar&amp;labelColor=f6f6f6&amp;color=9cf&amp;style=flat&amp;label=citations"></a>.
 
-# 🔥 News
+### 🔥 News
 <!-- - *2023.02.10*: &nbsp;🎉🎉 Start school.  -->
 - *2023.08.15*: &nbsp;🎉 One paper accepted by IEEE TCAS-I, about enabling mixed radix-2/4 NTT in the hardware implementation of CRYSTALS-Kyber PQC by a novel memory access pattern.
 - *2023.08.07*: &nbsp;🛠️ Start school.
@@ -13,7 +13,7 @@ My research interest includes computer architecture, and hardware accelerator of
 - *2023.02.15*: &nbsp; Teaching assistant of microprocessor principle and design.
 - *2023.02.10*: &nbsp;🛠️ Start school.
 
-# 📝 Publications 
+### 📝 Publications 
 
 - `[J] IEEE TCAS-II` **W. Guo**, S. Li and L. Kong, ["An Efficient Implementation of KYBER,"](https://ieeexplore.ieee.org/document/9509281) in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 1562-1566, March 2022, doi: 10.1109/TCSII.2021.3103184. 
   
@@ -23,12 +23,12 @@ My research interest includes computer architecture, and hardware accelerator of
 
 - `[J] IEEE TVLSI` **W. Guo** and S. Li, ["Fast Binary Counters and Compressors Generated by Sorting Network,"](https://ieeexplore.ieee.org/document/9388166) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 6, pp. 1220-1230, June 2021, doi: 10.1109/TVLSI.2021.3067010.
 
-# 🛠️ Projects
+### 🛠️ Projects
 - RISC-V processor with RV64I instruction set, tape-out with TSMC 110nm process, support [RT-Thread](https://github.com/RT-Thread/rt-thread) operating system.
 - Hardware accelerator of CRYSTALS-Kyber.
 - Hardware accelerator of B/FV FHE.
 
-# 🎖 Honors and Awards
+### 🎖 Honors and Awards
 - `2021` Comprehensive excellent scholarship.
 - `2018` National Scholarship. 
 - `2018` The Second National Undergraduate IC Innovation and Entrepreneurship Competition (第二届全国大学生集成电路创新创业大赛), First prize of Northwest Division, National Finals Excellence Award.
@@ -36,6 +36,6 @@ My research interest includes computer architecture, and hardware accelerator of
 - `2017` National Scholarship. 
 - `2016` National Scholarship. 
 
-# 📖 Educations
+### 📖 Educations
 - *2019.09 - now*, Doctoral student in the School of Integrated Circuits, Tsinghua University (SIC THU), Beijing, China. 
 - *2015.09 - 2019.06*, Undergraduate, School of Software and Microelectronics, Northwestern Polytechnical University (NPU), Xi'an, China.